Architecture

Boot Process

VernisOS uses a 3-stage bootloader written in NASM Assembly. The bootloader handles everything from BIOS handoff to kernel loading.

Stage 1 — MBR (512 bytes)

The Master Boot Record is loaded by BIOS at address 0x7C00. It sets up a minimal environment and loads Stage 2.

nasm

; boot.asm — MBR Stage 1
[BITS 16]
[ORG 0x7C00]

start:
    cli
    xor ax, ax
    mov ds, ax
    mov es, ax
    mov ss, ax
    mov sp, 0x7C00

    ; Load Stage 2 from sector 1
    mov ah, 0x02        ; BIOS read sectors
    mov al, 32          ; Read 32 sectors
    mov ch, 0           ; Cylinder 0
    mov cl, 2           ; Start from sector 2
    mov dh, 0           ; Head 0
    mov bx, 0x7E00      ; Load to 0x7E00
    int 0x13

    jmp 0x0000:0x7E00   ; Jump to Stage 2

times 510-($-$$) db 0
dw 0xAA55

Stage 2 — CPUID Detection & Mode Switch

Stage 2 detects the CPU architecture via CPUID and switches to the appropriate mode:

x86 path

If CPUID indicates 32-bit only → stays in protected mode → loads 32-bit kernel

x64 path

If long mode is supported → enables PAE + long mode → jumps to 64-bit kernel entry

Fallback

If CPUID is unavailable → defaults to 32-bit protected mode

Stage 3 — Kernel Loading

Once in the correct mode, the kernel is loaded from disk into memory and control is transferred:

nasm

; Stage 3 — Load kernel into memory
[BITS 64]
kernel_entry:
    ; Set up 64-bit GDT
    lgdt [gdt64_ptr]

    ; Load kernel from disk (sectors 33-2048)
    mov rdi, 0x100000    ; Load address: 1MB
    mov rsi, 33          ; Starting sector
    call load_sectors

    ; Jump to kernel C entry point
    call kernel_main
    jmp $

← System Overview Microkernel →